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ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Data Sheet September 12, 2005 FN6085.6
15kV ESD Protected, 5V, Full Fail-Safe, Fractional (1/8) Unit Load, RS-485/RS-422 Transceivers
The ISL8308XE are BiCMOS, ESD protected, 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Each driver output, and receiver input, is protected against 15kV ESD strikes without latch-up, and unlike competitive products, this Intersil family is specified for 10% tolerance supplies (4.5V to 5.5V). These devices have very low bus currents (+125A/-75A), so they present a true "1/8 unit load" to the RS-485 bus. This allows up to 256 transceivers on the network without violating the RS-485 specification's 32 unit load maximum, and without using repeaters. For example, in a remote utility meter reading system, individual meter readings are routed to a concentrator via an RS-485 network, so the high allowed node count minimizes the number of repeaters required. Data for all meters is then read out from the concentrator via a single access port, or a wireless link. Receiver (Rx) inputs feature a "Full Fail-Safe" design, which ensures a logic high Rx output if Rx inputs are floating, shorted, or terminated but undriven. The ISL83080E, ISL83082E, ISL83083E, ISL83085E utilize slew rate limited drivers which reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. Slew rate limited versions also include receiver input filtering to enhance noise immunity in the presence of slow input signals. Hot Plug circuitry ensures that the Tx and Rx outputs remain in a high impedance state until the power supply has stabilized, and the Tx outputs are fully short circuit protected. The ISL83080E, ISL83083E, ISL83086E are configured for full duplex (separate Rx input and Tx output pins) applications. The half duplex versions multiplex the Rx inputs and Tx outputs to allow transceivers with output disable functions in 8 lead packages.
Features
* Pb-Free Plus Anneal Available (RoHS Compliant) (See Ordering Info) * RS-485 I/O Pin ESD Protection . . . . . . . . . . 15kV HBM Class 3 ESD Protection (HBM) on all Pins. . . . . . . . >7kV * Full Fail-safe (Open, Short, Terminated and Floating) Receivers * Hot Plug Circuitry (ISL83080E, ISL83082E, ISL83083E, ISL83085E) - Tx and Rx Outputs Remain Three-state During Powerup/Power-down * True 1/8 Unit Load Allows up to 256 Devices on the Bus * Specified for Single 5V, 10% Tolerance, Supplies * High Data Rates. . . . . . . . . . . . . . . . . . . . . up to 10Mbps * Low Quiescent Supply Current . . . . . . . . . . . . . . . 530A Ultra Low Shutdown Supply Current . . . . . . . . . . . . 70nA * -7V to +12V Common Mode Input Voltage Range * Half and Full Duplex Pinouts * Three-State Rx and Tx Outputs * Current Limiting and Thermal Shutdown for driver Overload Protection
Applications
* Automated Utility Meter Reading Systems * High Node Count Systems * Factory Automation * Field Bus Networks * Security Camera Networks * Building Environmental Control Systems * Industrial/Process Control Networks
TABLE 1. SUMMARY OF FEATURES PART NUMBER ISL83080E ISL83082E ISL83083E ISL83085E ISL83086E ISL83088E HALF/FULL DATA RATE SLEW-RATE # DEVICES DUPLEX (Mbps) LIMITED? HOT PLUG ON BUS Full Half Full Half Full Half 0.115 0.115 0.5 0.5 10 10 Yes Yes Yes Yes No No Yes Yes Yes Yes No No 256 256 256 256 256 256 Rx/Tx ENABLE? Yes Yes Yes Yes Yes Yes QUIESCENT ICC (A) 530 530 530 530 530 530 LOW POWER SHUTDOWN? Yes Yes Yes Yes Yes Yes PIN COUNT 14 8 14 8 14 8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004-2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Pinouts
ISL83082E, ISL83085E, ISL83088E (MSOP, SOIC) TOP VIEW
RO 1 RE 2 DE 3 DI 4 D 8 7 6 5 VCC B/Z A/Y GND
ISL83080E, ISL83083E, ISL83086E (SOIC) TOP VIEW
NC 1 RO 2 R RE 3 DE 4 DI 5 GND 6 GND 7 D 12 A 11 B 10 Z 9Y 8 NC 14 VCC 13 NC
R
Ordering Information
PART NO. (BRAND) ISL83080EIB (83080EIB) ISL83080EIBZ (83080EIBZ, Note 2) ISL83082EIB (83082EIB) ISL83082EIBZ (83082EIBZ, Note 2) ISL83082EIU (3082E) ISL83082EIUZ (3082Z, Note 2) ISL83083EIB (83083EIB) ISL83083EIBZ (83083EIBZ, Note 2) ISL83085EIB (83085EIB) ISL83085EIBZ (83085EIBZ, Note 2) ISL83085EIU (3085E) ISL83085EIUZ (3085Z, Note 2) ISL83086EIB (83086EIB) ISL83086EIBZ (83086EIBZ, Note 2) ISL83088EIB (83088EIB) ISL83088EIBZ (83088EIBZ, Note 2) ISL83088EIU (3088E)
(Note 1) PACKAGE 14 Ld SOIC 14 Ld SOIC (Pb-Free) 8 Ld SOIC 8 Ld SOIC (Pb-Free) 8 Ld MSOP 8 Ld MSOP (Pb-free) 14 Ld SOIC 14 Ld SOIC (Pb-Free) 8 Ld SOIC 8 Ld SOIC (Pb-Free) 8 Ld MSOP 8 Ld MSOP (Pb-free) 14 Ld SOIC 14 Ld SOIC (Pb-Free) 8 Ld SOIC 8 Ld SOIC (Pb-Free) 8 Ld MSOP PKG. DWG. # M14.15 M14.15 M8.15 M8.15 M8.118 M8.118 M14.15 M14.15 M8.15 M8.15 M8.118 M8.118 M14.15 M14.15 M8.15 M8.15 M8.118
Ordering Information
PART NO. (BRAND) ISL83088EIUZ (3088Z, Note 2)
(Note 1) (Continued) PACKAGE 8 Ld MSOP (Pb-free) PKG. DWG. # M8.118
TEMP. RANGE (C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85
TEMP. RANGE (C) -40 to 85
NOTES: 1. Units also available in Tape and Reel; Add "-T" to suffix. 2. Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pbfree soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Truth Tables
TRANSMITTING INPUTS RE X X 0 1 DE 1 1 0 0 DI 1 0 X X Z 0 1 High-Z High-Z * OUTPUTS Y 1 0 High-Z High-Z * 0 0 0 1 1 RE RECEIVING INPUTS DE DE Half Duplex Full Duplex 0 0 0 0 1 X X X 0 1 A-B -0.05V -0.2V Inputs Open/Shorted X X OUTPUT RO 1 0 1 High-Z * High-Z
NOTE: *Shutdown Mode (See Note 9).
NOTE: *Shutdown Mode (See Note 9).
Pin Descriptions
PIN RO RE DE DI GND A/Y FUNCTION Receiver output: If A-B -50mV, RO is high; If A-B -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted. Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. Ground connection. 15kV HBM ESD Protected RS-485/422 level, noninverting receiver input and noninverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. 15kV HBM ESD Protected RS-485/422 level, Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. 15kV HBM ESD Protected RS-485/422 level, noninverting receiver input. 15kV HBM ESD Protected RS-485/422 level, inverting receiver input. 15kV HBM ESD Protected RS-485/422 level, noninverting driver output. 15kV HBM ESD Protected RS-485/422 level, inverting driver output. System power supply input (4.5V to 5.5V). No Connection.
B/Z
A B Y Z VCC NC
3
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Typical Operating Circuit
ISL83082E, ISL83085E, ISL83088E
+5V + 8 VCC 1 RO 2 RE 3 DE 4 DI R B/Z A/Y 7 6 RT RT 7 6 B/Z A/Y 0.1F 0.1F + 8 VCC D DI 4 DE 3 RE 2 R GND 5 GND 5 RO 1 +5V
D
ISL83080E, ISL83083E, ISL83086E
+5V + 14 VCC 2 RO 3 RE 4 DE Z 10 5 DI D GND 6, 7 Y9 RT 11 B 12 A GND 6, 7 R R A 12 B 11 0.1F RT 0.1F + 14 9Y 10 Z VCC D DI 5 DE 4 RE 3 RO 2 +5V
4
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V) Input/Output Voltages A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V A, B, Y, Z (Transient Pulse Through 100) . . . . . . . . . . . . . 25V RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V) Short Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance (Typical, Note 3)
JA (C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 105 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 140 14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 128 Maximum Junction Temperature (Plastic Package) . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C (Note 4) SYMBOL TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Driver Differential VOUT (no load) Driver Differential VOUT (with load)
VOD1 VOD2 RL = 100 (RS-422) (Figure 1A) RL = 54 (RS-485) (Figure 1A) RL = 60, -7V VCM 12V (Figure 1B)
Full Full Full Full Full
2 1.5 1.5 -
2.9 2.4 2.6 0.01
VCC VCC 0.2
V V V V V
Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States Logic Input High Voltage Logic Input Low Voltage DI Input Hysteresis Voltage Logic Input Current Input Current (A, B)
VOD
RL = 54 or 100 (Figure 1A)
VOC VOC
RL = 54 or 100 (Figure 1A) RL = 54 or 100 (Figure 1A)
Full Full
-
2.85 0.01
3 0.1
V V
VIH VIL VHYS IIN1 IIN2
DE, DI, RE DE, DI, RE
Full Full 25
2 -2 -75 -75 -20 -200 -
100 70 55 7 11 0 9 -90 20
0.8 2 125 125 20 250 -50 -
V V mV A A A A A A A mA mV mV
DE, DI, RE DE = 0V, VCC = 0V or 5.5V VIN = 12V VIN = -7V
Full Full Full Full Full Full Full Full Full 25
Output Leakage Current (Y, Z) (Full Duplex Versions Only) Output Leakage Current (Y, Z) in Shutdown Mode (Full Duplex) Driver Short-Circuit Current, VO = High or Low Receiver Differential Threshold Voltage Receiver Input Hysteresis
IIN3
RE = 0V, DE = 0V, VCC = 0V or 5.5V
VIN = 12V VIN = -7V
IIN3
RE = VCC, DE = 0V, VCC = 0V VIN = 12V or 5.5V VIN = -7V DE = VCC, -7V VY or VZ 12V (Note 6) -7V VCM 12V VCM = 0V
IOSD1 VTH VTH
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FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C (Note 4) (Continued) SYMBOL VOH VOL IOZR RIN IOSR TEST CONDITIONS IO = -4mA, VID = -50mV IO = -4mA, VID = -200mV 0.4V VO 2.4V -7V VCM 12V 0V VO VCC TEMP (C) Full Full Full Full Full MIN VCC - 1 -1 96 7 TYP 4.6 0.2 0.03 160 MAX 0.4 1 85 UNITS V V A k mA
PARAMETER Receiver Output High Voltage Receiver Output Low Voltage Three-State (high impedance) Receiver Output Current Receiver Input Resistance Receiver Short-Circuit Current SUPPLY CURRENT No-Load Supply Current (Note 5)
ICC
Half Duplex Versions, DE = VCC, RE = X, DI = 0V or VCC All Versions, DE = 0V, RE = 0V, or Full Duplex Versions, DE = VCC, RE = X. DI = 0V or VCC
Full Full Full
-
560 530 0.07
700 650 2
A A A
Shutdown Supply Current ESD PERFORMANCE RS-485 Pins (A, Y, B, Z) All Other Pins
ISHDN
DE = 0V, RE = VCC, DI = 0V or VCC
Human Body Model (HBM), Pin to GND HBM, per MIL-STD-883 Method 3015
25 25
-
15 7
-
kV kV
DRIVER SWITCHING CHARACTERISTICS (115kbps Versions; ISL83080E, ISL83082E) Driver Differential Output Delay Driver Differential Output Skew Driver Differential Rise or Fall Time Maximum Data Rate Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output Low Driver Disable from Output High Time to Shutdown Driver Enable from Shutdown to Output High Driver Enable from Shutdown to Output Low tPLH, tPHL tSKEW t R , tF fMAX tZH tZL tLZ tHZ tSHDN RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) CD = 820pF (Figure 4, Note 12) RL = 500, CL = 100pF, SW = GND (Figure 3), (Note 7) RL = 500, CL = 100pF, SW = VCC (Figure 3), (Note 7) RL = 500, CL = 15pF, SW = VCC (Figure 3) RL = 500, CL = 15pF, SW = GND (Figure 3) (Notes 9, 12) Full Full Full Full Full Full Full Full Full Full Full 500 667 115 60 780 40 1000 666 278 35 67 38 160 400 155 1300 100 1500 1500 1500 100 100 600 2000 2000 ns ns ns kbps ns ns ns ns ns ns ns
tZH(SHDN) RL = 500, CL = 100pF, SW = GND (Figure 3), (Notes 9, 10) tZL(SHDN) RL = 500, CL = 100pF, SW = VCC (Figure 3), (Notes 9, 10)
DRIVER SWITCHING CHARACTERISTICS (500kbps Versions; ISL83083E, ISL83085E) Driver Differential Output Delay Driver Differential Output Skew Driver Differential Rise or Fall Time Maximum Data Rate Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output Low tPLH, tPHL tSKEW t R , tF fMAX tZH tZL tLZ RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) CD = 820pF (Figure 4, Note 12) RL = 500, CL = 100pF, SW = GND (Figure 3), (Note 7) RL = 500, CL = 100pF, SW = VCC (Figure 3), (Note 7) RL = 500, CL = 15pF, SW = VCC (Figure 3) Full Full Full Full Full Full Full 250 200 500 360 20 475 1000 137 35 65 1000 100 750 1000 1000 100 ns ns ns kbps ns ns ns
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FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C (Note 4) (Continued) SYMBOL tHZ tSHDN TEST CONDITIONS RL = 500, CL = 15pF, SW = GND (Figure 3) (Notes 9, 12) TEMP (C) Full Full Full Full MIN 60 TYP 38 160 260 155 MAX 100 600 1500 1500 UNITS ns ns ns ns
PARAMETER Driver Disable from Output High Time to Shutdown Driver Enable from Shutdown to Output High Driver Enable from Shutdown to Output Low
tZH(SHDN) RL = 500, CL = 100pF, SW = GND (Figure 3), (Notes 9, 10) tZL(SHDN) RL = 500, CL = 100pF, SW = VCC (Figure 3), (Notes 9, 10)
DRIVER SWITCHING CHARACTERISTICS (10Mbps Versions; ISL83086E, ISL83088E) Driver Differential Output Delay Driver Differential Output Skew Driver Differential Rise or Fall Time Maximum Data Rate Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output Low Driver Disable from Output High Time to Shutdown Driver Enable from Shutdown to Output High Driver Enable from Shutdown to Output Low tPLH, tPHL tSKEW t R , tF fMAX tZH tZL tLZ tHZ tSHDN RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) CD = 470pF (Figure 4, Note 12) RL = 500, CL = 100pF, SW = GND (Figure 3), (Note 7) RL = 500, CL = 100pF, SW = VCC (Figure 3), (Note 7) RL = 500, CL = 15pF, SW = VCC (Figure 3) RL = 500, CL = 15pF, SW = GND (Figure 3) (Notes 9, 12) Full Full Full Full Full Full Full Full Full Full Full 10 60 20 1 13 15 35 30 66 38 160 115 84 60 10 25 150 150 100 100 600 250 250 ns ns ns Mbps ns ns ns ns ns ns ns
tZH(SHDN) RL = 500, CL = 100pF, SW = GND (Figure 3), (Notes 9, 10) tZL(SHDN) RL = 500, CL = 100pF, SW = VCC (Figure 3), (Notes 9, 10)
RECEIVER SWITCHING CHARACTERISTICS (115kbps and 500kbps Versions; ISL83080E-ISL83085E) Maximum Data Rate Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable from Output Low Receiver Disable from Output High Time to Shutdown Receiver Enable from Shutdown to Output High Receiver Enable from Shutdown to Output Low fMAX tPLH, tPHL tSKD tZL tZH tLZ tHZ tSHDN (Figure 5, Note 12) (Figure 5) (Figure 5) RL = 1k, CL = 15pF, SW = VCC (Figure 6), (Note 8) RL = 1k, CL = 15pF, SW = GND (Figure 6), (Note 8) RL = 1k, CL = 15pF, SW = VCC (Figure 6) RL = 1k, CL = 15pF, SW = GND (Figure 6) (Notes 9, 12) Full Full Full Full Full Full Full Full Full Full 0.5 60 10 100 7 10 10 10 10 160 150 150 150 10 50 50 50 50 600 2000 2000 Mbps ns ns ns ns ns ns ns ns ns
tZH(SHDN) RL = 1k, CL = 15pF, SW = GND (Figure 6), (Notes 9, 11) tZL(SHDN) RL = 1k, CL = 15pF, SW = VCC (Figure 6), (Notes 9, 11)
RECEIVER SWITCHING CHARACTERISTICS (10Mbps Versions; ISL83086E, ISL83088E) Maximum Data Rate Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Enable to Output Low fMAX tPLH, tPHL tSKD tZL (Figure 5, Note 12) (Figure 5) (Figure 5) RL = 1k, CL = 15pF, SW = VCC (Figure 6), (Note 8) Full Full Full Full 10 15 70 0 10 125 10 30 Mbps ns ns ns
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FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25C (Note 4) (Continued) SYMBOL tZH tLZ tHZ tSHDN TEST CONDITIONS RL = 1k, CL = 15pF, SW = GND (Figure 6), (Note 8) RL = 1k, CL = 15pF, SW = VCC (Figure 6) RL = 1k, CL = 15pF, SW = GND (Figure 6) (Notes 9, 12) TEMP (C) Full Full Full Full Full Full MIN 60 TYP 10 10 10 160 150 150 MAX 30 30 30 600 2000 2000 UNITS ns ns ns ns ns ns
PARAMETER Receiver Enable to Output High Receiver Disable from Output Low Receiver Disable from Output High Time to Shutdown Receiver Enable from Shutdown to Output High Receiver Enable from Shutdown to Output Low NOTES:
tZH(SHDN) RL = 1k, CL = 15pF, SW = GND (Figure 6), (Notes 9, 11) tZL(SHDN) RL = 1k, CL = 15pF, SW = VCC (Figure 6), (Notes 9, 11)
4. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 5. Supply current specification is valid for loaded drivers when DE = 0V. 6. Applies to peak current. See "Typical Performance Curves" for more information. 7. Keep RE = 0 to prevent the device from entering SHDN. 8. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 9. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See "Low-Power Shutdown Mode" section. 10. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 11. Set the RE signal high time >600ns to ensure that the device enters SHDN. 12. Guaranteed by characterization but not tested.
Test Circuits and Waveforms
VCC
DE DI D Y Z VOD
RL/2 VCC
375 DE DI D Y Z VOD RL = 60 VCM -7V to +12V 375
RL/2
VOC
FIGURE 1A. VOD AND VOC
FIGURE 1B. VOD WITH COMMON MODE LOAD FIGURE 1. DC DRIVER TEST CIRCUITS
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FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Test Circuits and Waveforms (Continued)
3V DI 1.5V 1.5V 0V CL = 100pF Z D Y SIGNAL GENERATOR DIFF OUT (Y - Z) tR SKEW = |tPLH - tPHL| RDIFF CL = 100pF OUT (Y) VOL OUT (Z)
VCC
DE DI
tPLH
tPHL VOH
90% 10%
90% 10% tF
+VOD -VOD
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE DI D SIGNAL GENERATOR Y CL SW Z 500 VCC GND DE NOTE 9 tZH, tZH(SHDN) tHZ OUTPUT HIGH VOH - 0.5V OUT (Y, Z) 2.3V 0V tZL, tZL(SHDN) NOTE 9 OUT (Y, Z) 2.3V OUTPUT LOW VOL + 0.5V V OL tLZ VCC VOH 1.5V 1.5V 0V 3V
PARAMETER OUTPUT tHZ tLZ tZH tZL tZH(SHDN) tZL(SHDN) Y/Z Y/Z Y/Z Y/Z Y/Z Y/Z
RE X X 0 (Note 7) 0 (Note 7) 1 (Note 10) 1 (Note 10)
DI 1/0 0/1 1/0 0/1 1/0 0/1
SW GND VCC GND VCC GND VCC
CL (pF) 15 15 100 100 100 100
NOTE 9
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
VCC
DE
+
3V DI 0V Z D Y 60 CD VOD
-
DI
SIGNAL GENERATOR
DIFF OUT (Y - Z) -VOD
+VOD
0V
FIGURE 4A. TEST CIRCUIT FIGURE 4. DRIVER DATA RATE
FIGURE 4B. MEASUREMENT POINTS
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FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Test Circuits and Waveforms (Continued)
RE 0V B A R 15pF RO tPLH SIGNAL GENERATOR 1.5V tPHL VCC RO 1.5V 0V A 0V 0V -1.5V +1.5V
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY AND DATA RATE
RE GND SIGNAL GENERATOR B A R RO 1k SW 15pF VCC GND RE
NOTE 9 3V 1.5V 1.5V 0V tZH, tZH(SHDN) NOTE 9 tHZ OUTPUT HIGH VOH - 0.5V RO 1.5V 0V tZL, tZL(SHDN) NOTE 9 RO 1.5V OUTPUT LOW VOL + 0.5V V OL tLZ VCC VOH
PARAMETER tHZ tLZ tZH (Note 8) tZL (Note 8) tZH(SHDN) (Note 11) tZL(SHDN) (Note 11)
DE 0 0 0 0 0 0
A +1.5V -1.5V +1.5V -1.5V +1.5V -1.5V
SW GND VCC GND VCC GND VCC
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES
Application Information
RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a pointto-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 spec requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000', so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields.
Receiver Features
These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is 200mV, as required by the RS-422 and RS-485 specifications. Receiver input resistance of 96k surpasses the RS-422 spec of 4k, and is eight times the RS-485 "Unit Load (UL)" requirement of 12k minimum. Thus, these products are known as "one-eighth UL" transceivers, and there can be up to 256 of these devices on a network while still complying with the RS-485 loading spec. Receiver inputs function with common mode voltages as great as 7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks where induced voltages are a realistic concern. All the receivers include a "full fail-safe" function that guarantees a high level receiver output if the receiver inputs are unconnected (floating) or shorted.
10
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Receivers easily meet the data rates supported by the corresponding driver, and all receiver outputs are threestatable via the active low RE input. to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and without degrading the RS-485 common mode range of -7V to +12V. This built-in ESD protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present.
Driver Features
The RS-485/422 driver is a differential output device that delivers at least 1.5V across a 54 load (RS-485), and at least 2V across a 100 load (RS-422). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. All drivers are three-statable via the active high DE input. The 115kbps and 500kbps driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. Outputs of the ISL83086E, ISL83088E drivers are not limited, so faster output transition times allow data rates of at least 10Mbps.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000', but the maximum system data rate decreases as the transmission length increases. Devices operating at 10Mbps are limited to lengths less than 100', while the 115kbps versions can operate at full data rates with lengths of several thousand feet. Twisted pair is the cable of choice for RS-485/422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. Proper termination is imperative, when using the 10Mbps devices, to minimize reflections. Short networks using the 115kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible.
Hot Plug Function
When a piece of equipment powers up, there is a period of time where the processor or ASIC driving the RS-485 control lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx outputs are kept disabled. If the equipment is connected to the bus, a driver activating prematurely during power up may crash the bus. To avoid this scenario, the ISL83080, ISL83082, ISL83083, ISL83085 versions incorporate a "Hot Plug" function. Circuitry monitoring VCC ensures that, during power up and power down, the Tx and Rx outputs remain disabled, regardless of the state of DE and RE, if VCC is less than ~3.4V. This gives the processor/ASIC a chance to stabilize and drive the RS-485 control lines to the proper states.
DI = VCC VCC DRIVER Y OUTPUT (V) 3.4V 3.2V 2.5 0 5 A/Y 2.5 RECEIVER OUTPUT (V) ISL83080E 0 5 RO ISL83080E 0 RL = 1k 2.5 RL = 1k VCC (V) 5
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers survive worst case bus contentions undamaged. These devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the RS-485 spec, even at the common mode voltage range extremes. Additionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about 15 degrees. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown.
FN6085.6 September 12, 2005
TIME (40s/DIV)
FIGURE 7. HOT PLUG PERFORMANCE (ISL83080E) vs DEVICE WITHOUT HOT PLUG CIRCUITRY (ISL83086E)
ESD Protection
All pins on these devices include class 3 Human Body Model (HBM) ESD protection structures, but the RS-485 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ESD events in excess of 15kV HBM. The RS-485 pins are particularly vulnerable to ESD damage because they typically connect 11
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Low Power Shutdown Mode
These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but they also include a shutdown feature that reduces the already low quiescent ICC to a 70nA trickle. These devices enter shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for less than 60ns guarantees that the transceiver will not enter shutdown. Note that receiver and driver enable times increase when the transceiver enables from shutdown. Refer to Notes 7-11, at the end of the Electrical Specification table, for more information.
Typical Performance Curves
90 80 70 60 50 40 30 20 10 0 0 DRIVER OUTPUT CURRENT (mA)
VCC = 5V, TA = 25C; Unless Otherwise Specified
3.4 DIFFERENTIAL OUTPUT VOLTAGE (V) 3.2 RDIFF = 100 3 2.8 2.6 2.4 2.2 2 -40 RDIFF = 54
1 2 3 4 DIFFERENTIAL OUTPUT VOLTAGE (V)
5
-25
0 25 TEMPERATURE (C)
50
75
85
FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE
FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE
200 150 Y OR Z = LOW OUTPUT CURRENT (mA) 100
560
ISL83086E/88E
550 HALF DUPLEX, DE = VCC, RE = X 540
ISL83080E thru ISL83085E ICC (A) 50 0 -50 Y OR Z = HIGH 510 530
520 HALF DUPLEX, DE = GND, RE = GND FULL DUPLEX, DE = X, RE = GND
-100 ISL8308XE -150 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 12
500 -40
-25
0
25
50
75
85
TEMPERATURE (C)
FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
FIGURE 11. SUPPLY CURRENT vs TEMPERATURE
12
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Typical Performance Curves
880 860 PROPAGATION DELAY (ns) 840 820 800 780 760 740 -40 tPLH SKEW (ns) tPHL 50
VCC = 5V, TA = 25C; Unless Otherwise Specified (Continued)
60
55
45
40
35 |CROSS PT. OF Y & Z - CROSS PT. OF Y & Z|
-25
0
25
50
75
85
30 -40
-25
0
25
50
75
85
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 12. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE (ISL83080E, ISL83082E)
FIGURE 13. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL83080E, ISL83082E)
400
27 26
390 PROPAGATION DELAY (ns)
25 24 SKEW (ns) tPHL 23 22 21 20 tPLH 19 18 |CROSS PT. OF Y & Z - CROSS PT. OF Y & Z| -25 0 25 50 75 85
380
370
360
350
340 -40
-25
0
25
50
75
85
17 -40
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 14. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE (ISL83083E, ISL83085E)
20
FIGURE 15. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL83083E, ISL83085E)
0.7
PROPAGATION DELAY (ns)
19 tPHL 18 tPLH 17 SKEW (ns) 0.65
0.6
0.55 16 |CROSS PT. OF Y & Z - CROSS PT. OF Y & Z| 15 -40 -25 0 25 50 75 85 TEMPERATURE (C) 0.5 -40 -25 0 25 50 75 85
TEMPERATURE (C)
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE (ISL83086E, ISL83088E)
FIGURE 17. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL83086E, ISL83088E)
13
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Typical Performance Curves
RECEIVER OUTPUT (V)
VCC = 5V, TA = 25C; Unless Otherwise Specified (Continued)
DRIVER INPUT (V) RECEIVER OUTPUT (V) RDIFF = 54, CL = 100pF 5 DI 0 5 RO 0 DRIVER INPUT (V) DRIVER INPUT (V) DRIVER INPUT (V)
RDIFF = 54, CL = 100pF DI 5 0 5 RO 0
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
4 3 2 1 0 TIME (400ns/DIV) B/Z A/Y
4 3 2 1 0 TIME (400ns/DIV) A/Y B/Z
FIGURE 18. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83080E, ISL83082E)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL83080E, ISL83082E)
RECEIVER OUTPUT (V)
DRIVER INPUT (V)
RDIFF = 54, CL = 100pF DI 5 0 5 RO 0
RECEIVER OUTPUT (V)
RDIFF = 54, CL = 100pF 5 DI 0 5 RO 0
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
4 3 2 1 0 TIME (200ns/DIV) B/Z A/Y
4 3 2 1 0 TIME (200ns/DIV) A/Y B/Z
FIGURE 20. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83083E, ISL83085E)
FIGURE 21. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL83083E, ISL83085E)
RECEIVER OUTPUT (V)
DRIVER INPUT (V)
RDIFF = 54, CL = 100pF 5 DI 0 5 RO 0
RECEIVER OUTPUT (V)
RDIFF = 54, CL = 100pF 5 DI 0 5 RO 0
DRIVER OUTPUT (V)
3 2 1 0
B/Z A/Y
DRIVER OUTPUT (V)
4
4 3 2 1 0 TIME (20ns/DIV) A/Y B/Z
TIME (20ns/DIV)
FIGURE 22. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83086E, ISL83088E)
FIGURE 23. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL83086E, ISL83088E)
14
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Typical Performance Curves
40 RECEIVER OUTPUT CURRENT (mA) 35 30 25 VOH, 25C 20 15 10 5 0 0 1 2 3 4 5 VOH, 85C VOL, 25C VOL, 85C
VCC = 5V, TA = 25C; Unless Otherwise Specified (Continued)
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 525 PROCESS: Si Gate BiCMOS
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 24. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE
15
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1 E
INCHES SYMBOL MIN 0.037 0.002 0.030 0.010 0.004 0.116 0.116 MAX 0.043 0.006 0.037 0.014 0.008 0.120 0.120
MILLIMETERS MIN 0.94 0.05 0.75 0.25 0.09 2.95 2.95 MAX 1.10 0.15 0.95 0.36 0.20 3.05 3.05 NOTES 9 3 4 6 7 15o 6o Rev. 2 01/03
INDEX AREA
-B12 TOP VIEW 0.25 (0.010) GAUGE PLANE SEATING PLANE -C4X R1 R 0.20 (0.008) ABC
A A1 A2 b c D E1
4X L L1
e E L
0.026 BSC 0.187 0.016 0.199 0.028
0.65 BSC 4.75 0.40 5.05 0.70
A
A2
A1
-He D
b
0.10 (0.004) -A0.20 (0.008)
C
SEATING PLANE
L1 N R
0.037 REF 8 0.003 0.003 5o 0o 15o 6o
0.95 REF 8 0.07 0.07 5o 0o
C a C L E1
C
R1 0
SIDE VIEW
-B-
0.20 (0.008)
CD
END VIEW
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension "D" does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (0.004) at seating Plane. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
16
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 8.55 3.80 MAX 1.75 0.25 0.51 0.25 8.75 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.3367 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.3444 0.1574
A1 B C D E

A1 0.10(0.004) C
e
B 0.25(0.010) M C AM BS
e H h L N
0.050 BSC 0.2284 0.0099 0.016 14 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 14 0o 6.20 0.50 1.27
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
17
FN6085.6 September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E

A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 18
FN6085.6 September 12, 2005

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